- 0 Results
Lowest price: € 111.99, highest price: € 150.33, average price: € 132.98
1
Order
at hive.co.uk
£ 91.05
(aprox. € 123.47)
Order

Designing Reliable And Efficient Networks On Chips - new book

ISBN: 9789048182008

Developing NoC based interconnect tailored to a particular application domain, satisfying the application performance constraints with minimum power-area overhead is a major challenge. Wi… More...

  - MPN: , SKU 11174649 Shipping costs:zzgl. Versandkosten, plus shipping costs
2
Order
at booklooker.de
€ 111.99
Shipment: € 0.00
Order

Murali, Srinivasan:

Designing Reliable and Efficient Networks on Chips - Paperback

2010, ISBN: 9789048182008

[ED: Softcover], [PU: Springer Netherlands], Developing NoC based interconnect tailored to a particular application domain, satisfying the application performance constraints with minimum… More...

  - Shipping costs:Versandkostenfrei, Versand nach Deutschland. (EUR 0.00) buecher.de GmbH & Co. KG
3
Designing Reliable and Efficient Networks on Chips - Srinivasan Murali
Order
at Indigo.ca
C$ 219.95
(aprox. € 150.33)
Order
Srinivasan Murali:
Designing Reliable and Efficient Networks on Chips - new book

ISBN: 9789048182008

Developing NoC based interconnect tailored to a particular application domain, satisfying the application performance constraints with minimum power-area overhead is a major challenge. Wi… More...

  - new Free shipping on orders above $25 Shipping costs:zzgl. Versandkosten, plus shipping costs
Paid advertisement
4
Order
at Indigo.ca
C$ 207.95
(aprox. € 144.35)
Order
Designing Reliable and Efficient Networks on Chips - new book

ISBN: 9789048182008

Developing NoC based interconnect tailored to a particular application domain, satisfying the application performance constraints with minimum power-area overhead is a major challenge. Wi… More...

new in stock. Shipping costs:zzgl. Versandkosten., plus shipping costs
5
Order
at printsasia.de
€ 134.77
Shipment: € 0.00
Order
Srinivasan Murali:
Designing Reliable and Efficient Networks on Chips - new book

ISBN: 9789048182008

Designing Reliable and Efficient Networks on Chips Author :Srinivasan Murali 9789048182008 904818200X

  - new Shipping costs: EUR 0.00

Details of the book
Designing Reliable and Efficient Networks on Chips

Developing NoC based interconnect tailored to a particular application domain, satisfying the application performance constraints with minimum power-area overhead is a major challenge. With technology scaling, as the geometries of on-chip devices reach the physical limits of operation, another important design challenge for NoCs will be to provide dynamic (run-time) support against permanent and intermittent faults that can occur in the system. The purpose of Designing Reliable and Efficient Networks on Chips is to provide state-of-the-art methods to solve some of the most important and time-intensive problems encountered during NoC design.

Details of the book - Designing Reliable and Efficient Networks on Chips


EAN (ISBN-13): 9789048182008
ISBN (ISBN-10): 904818200X
Hardcover
Paperback
Publishing year: 2010
Publisher: Springer-Verlag GmbH
208 Pages
Weight: 0,322 kg
Language: eng/Englisch

Book in our database since 2011-12-31T03:46:13-05:00 (New York)
Detail page last modified on 2021-07-26T08:47:32-04:00 (New York)
ISBN/EAN: 9789048182008

ISBN - alternate spelling:
90-481-8200-X, 978-90-481-8200-8


More/other books that might be very similar to this book

Latest similar book:
9781402098123 Designing Reliable and Efficient Networks on Chips (Murali, Srinivasan)


< to archive...