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Logic Optimization and Synthesis Techniques with Area-Power Trade-offs
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Logic Optimization and Synthesis Techniques with Area-Power Trade-offs - new book

ISBN: 9783639344721

In recent times, power consumption has been recognized as an important issue in implementing battery-operated portable devices. Power consumption is being addressed in all levels of VLSI … More...

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Logic Optimization and Synthesis Techniques with Area-Power Trade-Offs - Sambhu Nath Pradhan
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Sambhu Nath Pradhan:

Logic Optimization and Synthesis Techniques with Area-Power Trade-Offs - Paperback

ISBN: 9783639344721

Paperback, [PU: VDM Verlag], In recent times, power consumption has been recognized as an important issue in implementing battery-operated portable devices. Power consumption is being add… More...

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Pradhan, Sambhu Nath:
Logic Optimization and Synthesis Techniques With Area-Power Trade-Offs - Paperback

2004

ISBN: 9783639344721

Softcover, PLEASE NOTE, WE DO NOT SHIP TO DENMARK. New Book. Shipped from UK in 4 to 14 days. Established seller since 2000. Please note we cannot offer an expedited shipping service from… More...

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Sambhu Nath Pradhan:
Logic Optimization and Synthesis Techniques with Area-Power Trade-offs: A Genetic Algorithm based Approach - Paperback

2011, ISBN: 3639344723

[EAN: 9783639344721], Neubuch, [PU: VDM Verlag Dr. Müller], This book is printed on demand

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Pradhan, Sambhu Nath:
Logic Optimization and Synthesis Techniques with Area-Power Trade-offs - Paperback

2011, ISBN: 3639344723

[EAN: 9783639344721], Neubuch, [PU: Omniscriptum Gmbh & Co. Kg. 2011-04-29]

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Blackwell's, Oxford, OX, United Kingdom [8052444] [Rating: 5 (von 5)]

Details of the book
Logic Optimization and Synthesis Techniques with Area-Power Trade-offs

In recent times, power consumption has been recognized as an important issue in implementing battery-operated portable devices. Power consumption is being addressed in all levels of VLSI design. The saving will be higher if power issues are taken care of early in the design cycle. This has motivated us to consider power issue at the logic level. Due to the exponential nature of leakage in the subthreshold regime operation of transistors, leakage current can no longer be ignored. In this work we have adressed both the dynamic and leakage power consumption of the circuit. The problems addressed in this work handle multiple objectives, such as area, power etc. and a combination of these. Thus, based on relative priority of one over the other, the circuits can be optimized. We have developed both combinational and sequential logic synthesis techniques targeting the trade-offs in the final circuit. Two, and multilevel combinational circuit synthesis and optimization using GA have been presented. Effectiveness of power-gating technique to reduce power dissipation has been examined. A technology specific approach to reduce standby leakage has been developed.

Details of the book - Logic Optimization and Synthesis Techniques with Area-Power Trade-offs


EAN (ISBN-13): 9783639344721
ISBN (ISBN-10): 3639344723
Hardcover
Paperback
Publishing year: 2011
Publisher: VDM Verlag
180 Pages
Weight: 0,284 kg
Language: eng/Englisch

Book in our database since 2009-10-04T09:37:28-04:00 (New York)
Detail page last modified on 2020-05-06T10:03:03-04:00 (New York)
ISBN/EAN: 9783639344721

ISBN - alternate spelling:
3-639-34472-3, 978-3-639-34472-1


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