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Hardware Acceleration of EDA Algorithms - Kanupriya Gulati#Sunil P. Khatri
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Kanupriya Gulati#Sunil P. Khatri:
Hardware Acceleration of EDA Algorithms - new book

2010, ISBN: 9781441909435

ID: 805420736

Single-threaded software applications have ceased to see signi?cant gains in p- formance on a general-purpose CPU, even with further scaling in very large scale integration (VLSI) technology. This is a signi?cant problem for electronic design automation (EDA) applications, since the design complexity of VLSI integrated circuits (ICs) is continuously growing. In this research monograph, we evaluate custom ICs, ?eld-programmable gate arrays (FPGAs), and graphics processors as platforms for accelerating EDA algorithms, instead of the general-purpose sing- threaded CPU. We study applications which are used in key time-consuming steps of the VLSI design ?ow. Further, these applications also have different degrees of inherent parallelism in them. We study both control-dominated EDA applications and control plus data parallel EDA applications. We accelerate these applications on these different hardware platforms. We also present an automated approach for accelerating certain uniprocessor applications on a graphics processor. This monograph compares custom ICs, FPGAs, and graphics processing units (GPUs) as potential platforms to accelerate EDA algorithms. It also provides details of the programming model used for interfacing with the GPUs. This text covers the acceleration of EDA algorithms using hardware platforms such as FPGAs and GPUs. In it, widely applied CAD algorithms are evaluated and compared for potential acceleration on FPGAs and GPUs. Buch (fremdspr.) gebundene Ausgabe 06.04.2010 Bücher>Fremdsprachige Bücher>Englische Bücher, Springer, .201

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Hardware Acceleration of EDA Algorithms - Kanupriya Gulati#Sunil P. Khatri
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Kanupriya Gulati#Sunil P. Khatri:
Hardware Acceleration of EDA Algorithms - new book

ISBN: 9781441909435

ID: 836097767

Single-threaded software applications have ceased to see signi?cant gains in p- formance on a general-purpose CPU, even with further scaling in very large scale integration (VLSI) technology. This is a signi?cant problem for electronic design automation (EDA) applications, since the design complexity of VLSI integrated circuits (ICs) is continuously growing. In this research monograph, we evaluate custom ICs, ?eld-programmable gate arrays (FPGAs), and graphics processors as platforms for accelerating EDA algorithms, instead of the general-purpose sing- threaded CPU. We study applications which are used in key time-consuming steps of the VLSI design ?ow. Further, these applications also have different degrees of inherent parallelism in them. We study both control-dominated EDA applications and control plus data parallel EDA applications. We accelerate these applications on these different hardware platforms. We also present an automated approach for accelerating certain uniprocessor applications on a graphics processor. This monograph compares custom ICs, FPGAs, and graphics processing units (GPUs) as potential platforms to accelerate EDA algorithms. It also provides details of the programming model used for interfacing with the GPUs. This text covers the acceleration of EDA algorithms using hardware platforms such as FPGAs and GPUs. In it, widely applied CAD algorithms are evaluated and compared for potential acceleration on FPGAs and GPUs. Buch (fremdspr.) Bücher>Fremdsprachige Bücher>Englische Bücher, Springer

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Hardware Acceleration of EDA Algorithms: Custom ICs, FPGAs and GPUs - Sunil P Khatri, Kanupriya Gulati
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Sunil P Khatri, Kanupriya Gulati:
Hardware Acceleration of EDA Algorithms: Custom ICs, FPGAs and GPUs - new book

ISBN: 9781441909435

ID: 978144190943

This book deals with the acceleration of EDA algorithms using hardware platforms such as FPGAs and GPUs. Widely applied CAD algorithms are evaluated and compared for potential acceleration on FPGAs and GPUs. Coverage includes discussion of conditions under which it is preferable to use one platform over another, e.g., when an EDA problem has a high degree of data parallelism, the GPU is typically the preferred platform, whereas when the problem has more control, an FPGA may be preferred. Results are presented for the acceleration of several CAD algorithms (fault simulation, fault table generation, model card evaluation in SPICE, Monte Carlo statistical static timing analysis), demonstrating speedups from 30X to 800X.This book serves as a valuable guide on how best to leverage parallelism to accelerate CAD algorithms. It also presents a methodology to extract automatically SIMD parallelism from regular uniprocessor code. With this approach, uniprocessor code can automatically be converted to GPU code, allowing for significant acceleration. This approach is particularly useful, since different GPUs have vastly different specifications, making the manual generation of GPU code an unscalable proposition. Sunil P Khatri, Kanupriya Gulati, Books, Science and Nature, Hardware Acceleration of EDA Algorithms: Custom ICs, FPGAs and GPUs Books>Science and Nature, Springer US

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Hardware Acceleration of EDA Algorithms - Kanupriya Gulati
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Kanupriya Gulati:
Hardware Acceleration of EDA Algorithms - new book

ISBN: 9781441909435

[ED: Buch], [PU: Springer-Verlag GmbH], Neuware - Single-threaded software applications have ceased to see signi cant gains in p- formance on a general-purpose CPU, even with further scaling in very large scale integration (VLSI) technology. This is a signi cant problem for electronic design automation (EDA) applications, since the design complexity of VLSI integrated circuits (ICs) is continuously growing. In this research monograph, we evaluate custom ICs, eld-programmable gate arrays (FPGAs), and graphics processors as platforms for accelerating EDA algorithms, instead of the general-purpose sing- threaded CPU. We study applications which are used in key time-consuming steps of the VLSI design ow. Further, these applications also have different degrees of inherent parallelism in them. We study both control-dominated EDA applications and control plus data parallel EDA applications. We accelerate these applications on these different hardware platforms. We also present an automated approach for accelerating certain uniprocessor applications on a graphics processor. This monograph compares custom ICs, FPGAs, and graphics processing units (GPUs) as potential platforms to accelerate EDA algorithms. It also provides details of the programming model used for interfacing with the GPUs., DE, [SC: 0.00], Neuware, gewerbliches Angebot, 244x155x29 mm, 194, [GW: 469g], Banküberweisung, PayPal

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Hardware Acceleration of EDA Algorithms: Custom ICS, FPGAs and GPUs - Gulati, Kanupriya / Khatri, Sunil P.
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Gulati, Kanupriya / Khatri, Sunil P.:
Hardware Acceleration of EDA Algorithms: Custom ICS, FPGAs and GPUs - used book

ISBN: 9781441909435

ID: 6748510

This book deals with the acceleration of EDA algorithms using hardware platforms such as FPGAs and GPUs. Widely applied CAD algorithms are evaluated and compared for potential acceleration on FPGAs and GPUs. Coverage includes discussion of conditions under which it is preferable to use one platform over another, e.g., when an EDA problem has a high degree of data parallelism, the GPU is typically the preferred platform, whereas when the problem has more control, an FPGA may be preferred. Results are presented for the acceleration of several CAD algorithms (fault simulation, fault table generation, model card evaluation in SPICE, Monte Carlo statistical static timing analysis), demonstrating speedups from 30X to 800X. This book serves as a valuable guide on how best to leverage parallelism to accelerate CAD algorithms. It also presents a methodology to extract automatically SIMD parallelism from regular uniprocessor code. With this approach, uniprocessor code can automatically be converted to GPU code, allowing for significant acceleration. This approach is particularly useful, since different GPUs have vastly different specifications, making the manual generation of GPU code an unscalable proposition. Hardware Acceleration of EDA Algorithms: Custom ICS, FPGAs and GPUs Gulati, Kanupriya / Khatri, Sunil P., Springer

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Details of the book
Hardware Acceleration of EDA Algorithms

This book deals with the acceleration of EDA algorithms using hardware platforms such as FPGAs and GPUs. Widely applied CAD algorithms are evaluated and compared for potential acceleration on FPGAs and GPUs. Coverage includes discussion of conditions under which it is preferable to use one platform over another, e.g., when an EDA problem has a high degree of data parallelism, the GPU is typically the preferred platform, whereas when the problem has more control, an FPGA may be preferred. Results are presented for the acceleration of several CAD algorithms (fault simulation, fault table generation, model card evaluation in SPICE, Monte Carlo statistical static timing analysis), demonstrating speedups from 30X to 800X. This book serves as a valuable guide on how best to leverage parallelism to accelerate CAD algorithms. It also presents a methodology to extract automatically SIMD parallelism from regular uniprocessor code. With this approach, uniprocessor code can automatically be converted to GPU code, allowing for significant acceleration. This approach is particularly useful, since different GPUs have vastly different specifications, making the manual generation of GPU code an unscalable proposition.

Details of the book - Hardware Acceleration of EDA Algorithms


EAN (ISBN-13): 9781441909435
ISBN (ISBN-10): 1441909435
Hardcover
Publishing year: 2010
Publisher: Springer-Verlag GmbH
194 Pages
Weight: 0,469 kg
Language: eng/Englisch

Book in our database since 31.08.2009 19:52:02
Book found last time on 18.11.2017 21:09:57
ISBN/EAN: 9781441909435

ISBN - alternate spelling:
1-4419-0943-5, 978-1-4419-0943-5


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