English
United States
Sign in
Tip from find-more-books.com
Similar books
More/other books that might be very similar to this book
Search tools
Book recommendations
Latest news
Advertising
FILTER
- 0 Results
Lowest price: 106.95 €, highest price: 139.90 €, average price: 115.98 €
Minimizing and Exploiting Leakage in VLSI Design - Jayakumar, Nikhil; Paul, Suganth; Garg, Rajesh; Gulati, Kanupriya; Khatri, Sunil P.
book is out-of-stock
(*)
Jayakumar, Nikhil; Paul, Suganth; Garg, Rajesh; Gulati, Kanupriya; Khatri, Sunil P.:
Minimizing and Exploiting Leakage in VLSI Design - new book

2009, ISBN: 9781441909503

ID: 9781441909503

In englischer Sprache. Verlag: Springer US, Power consumption of VLSI (Very Large Scale Integrated) circuits has been growing at an alarmingly rapid rate. This increase in power consumption, coupled with the increasing demand for portable/hand-held electronics, has made power consumption a dominant concern in the design of VLSI circuits today. Traditionally, dynamic (switching) power has dominated the total power consumption of an IC. However, due to current scaling trends, leakage power has now become a major component of the total power consumption in VLSI circuits. Leakage power reduction is especially important in portable/hand-held electronics such as cell-phones and PDAs. This book presents two techniques aimed at reducing leakage power in digital VLSI ICs. The first technique reduces leakage through the selective use of high threshold voltage sleep transistors. The second technique reduces leakage by applying the optimal Reverse Body Bias (RBB) voltage. This book also shows readers how to turn the leakage problem into an opportunity, through the use of sub-threshold logic. PC-PDF, 214 Seiten, XXVII Seiten, 214 Seiten, 1., st Edition. [GR: 9684 - Nonbooks, PBS / Technik/Elektronik, Elektrotechnik, Nachrichtentechnik], [SW: - EDA], [DRM: hard-drm], [Ausgabe: 1]

New book Libreka.de
Libreka
Shipping costs:Versandkostenfrei innerhalb der BRD (EUR 0.00)
Details...
(*) Book out-of-stock means that the book is currently not available at any of the associated platforms we search.
Minimizing and Exploiting Leakage in VLSI Design - Nikhil Jayakumar, Suganth Paul, Rajesh Garg
book is out-of-stock
(*)
Nikhil Jayakumar, Suganth Paul, Rajesh Garg:
Minimizing and Exploiting Leakage in VLSI Design - new book

ISBN: 9781441909503

ID: 9781441909503

Power consumption of VLSI (Very Large Scale Integrated) circuits has been growing at an alarmingly rapid rate. This increase in power consumption, coupled with the increasing demand for portable/hand-held electronics, has made power consumption a dominant concern in the design of VLSI circuits today. Traditionally, dynamic (switching) power has dominated the total power consumption of an IC. However, due to current scaling trends, leakage power has now become a major component of the total power consumption in VLSI circuits. Leakage power reduction is especially important in portable/hand-held electronics such as cell-phones and PDAs. This book presents two techniques aimed at reducing leakage power in digital VLSI ICs. The first technique reduces leakage through the selective use of high threshold voltage sleep transistors. The second technique reduces leakage by applying the optimal Reverse Body Bias (RBB) voltage. This book also shows readers how to turn the leakage problem into an opportunity, through the use of sub-threshold logic.

New book Ciando.de
ciando.de
E-Book zum Download Shipping costs:Versandkostenfrei innerhalb der BRD (EUR 0.00)
Details...
(*) Book out-of-stock means that the book is currently not available at any of the associated platforms we search.
Minimizing and Exploiting Leakage in VLSI Design - Jayakumar, Nikhil; Paul, Suganth; Garg, Rajesh
book is out-of-stock
(*)
Jayakumar, Nikhil; Paul, Suganth; Garg, Rajesh:
Minimizing and Exploiting Leakage in VLSI Design - new book

2009, ISBN: 1441909508

ID: 9781441909503

In englischer Sprache. Verlag: Springer US, This book presents two techniques to reduce leakage power in digital VLSI ICs. The first reduces leakage through the selective use of high threshold voltage sleep transistors, while the second by applying the optimal Reverse Body Bias voltage. PC-PDF, 214 Seiten, XXVII Seiten, 214 Seiten, [GR: 9684 - Nonbooks, PBS / Technik/Elektronik, Elektrotechnik, Nachrichtentechnik], [SW: - Anlagenbau Elektronik und Nachrichtentechnik (Kommunikationstechnik)], [Ausgabe: 2010][PU:Springer US], [PU: Springer]

New book Libreka.de
Libreka
Shipping costs:plus shipping costs
Details...
(*) Book out-of-stock means that the book is currently not available at any of the associated platforms we search.
Minimizing and Exploiting Leakage in VLSI Design - Nikhil Jayakumar;Suganth Paul;Rajesh Garg;Kanupriya Gulati;Sunil P. Khatri
book is out-of-stock
(*)
Nikhil Jayakumar;Suganth Paul;Rajesh Garg;Kanupriya Gulati;Sunil P. Khatri:
Minimizing and Exploiting Leakage in VLSI Design - new book

ISBN: 9781441909503

ID: 9781441909503

[KW: PDF ,ELEKTROTECHNIK ,ELEKTRONIK,ELEKTROTECHNIK,NACHRICHTENTECHNIK] PDF ,ELEKTROTECHNIK ,ELEKTRONIK,ELEKTROTECHNIK,NACHRICHTENTECHNIK, [PU: Springer]

New book eBook.de
libri.de (eBooks)
Sofort lieferbar (Download), E-Book zum Download Shipping costs:plus shipping costs
Details...
(*) Book out-of-stock means that the book is currently not available at any of the associated platforms we search.
Minimizing and Exploiting Leakage in VLSI Design - Nikhil Jayakumar;  Suganth Paul;  Rajesh Garg
book is out-of-stock
(*)
Nikhil Jayakumar; Suganth Paul; Rajesh Garg:
Minimizing and Exploiting Leakage in VLSI Design - First edition

2009, ISBN: 9781441909503

ID: 21786229

[ED: 1], Auflage, eBook Download (PDF), eBooks, [PU: Springer-Verlag]

New book Lehmanns.de
Shipping costs:Download sofort lieferbar, , Versandkostenfrei innerhalb der BRD (EUR 0.00)
Details...
(*) Book out-of-stock means that the book is currently not available at any of the associated platforms we search.