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Memory-Based Logic Synthesis - Tsutomu Sasao
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Memory-Based Logic Synthesis - new book

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Energy; Energy, general; Circuits and Systems; Computer-Aided Engineering (CAD, CAE) and Design Embedded Systems, FPGA, Integrated Circuit Design, Logic Synthesis, Memory Books eBook, Spr… More...

  - In what will be a valuable reference for FPGA system designers and CAD tool developers, this book sets out the synthesis of logic functions using memories. Indeed, anyone using logic gates to design logic circuits will benefit from the methods described h Shipping costs: EUR 0.00
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Memory-Based Logic Synthesis - Karen Mannering
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Karen Mannering:

Memory-Based Logic Synthesis - new book

ISBN: 9781441981042

In what will be a valuable reference for FPGA system designers and CAD tool developers, this book sets out the synthesis of logic functions using memories. Indeed, anyone using logic gate… More...

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Memory-Based Logic Synthesis als eBook Download von Tsutomu Sasao, Tsutomu Sasao - Tsutomu Sasao, Tsutomu Sasao
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Memory-Based Logic Synthesis als eBook Download von Tsutomu Sasao, Tsutomu Sasao - new book

ISBN: 9781441981042

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Memory-Based Logic Synthesis als eBook Download von Tsutomu Sasao - Tsutomu Sasao
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Tsutomu Sasao:
Memory-Based Logic Synthesis als eBook Download von Tsutomu Sasao - new book

2011, ISBN: 9781441981042

Memory-Based Logic Synthesis:2011. Auflage Tsutomu Sasao Memory-Based Logic Synthesis:2011. Auflage Tsutomu Sasao eBooks > Sachthemen & Ratgeber > Technik, Springer New York

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Tsutomu Sasao:
Memory-Based Logic Synthesis - new book

2011, ISBN: 9781441981042

2011, eBook Download (PDF), eBooks, [PU: Springer New York]

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Details of the book - Memory-Based Logic Synthesis


EAN (ISBN-13): 9781441981042
ISBN (ISBN-10): 1441981047
Publishing year: 2011
Publisher: Springer New York
189 Pages
Language: eng/Englisch

Book in our database since 2011-08-22T15:33:31-04:00 (New York)
Detail page last modified on 2018-06-14T18:42:06-04:00 (New York)
ISBN/EAN: 1441981047

ISBN - alternate spelling:
1-4419-8104-7, 978-1-4419-8104-2
Alternate spelling and related search-keywords:
Book author: tsutomu
Book title: synthesis


Information from Publisher

Author: Tsutomu Sasao
Title: Memory-Based Logic Synthesis
Publisher: Springer; Springer US
189 Pages
Publishing year: 2011-03-01
New York; NY; US
Printed / Made in
Language: English
96,29 € (DE)
99,00 € (AT)
118,00 CHF (CH)
Available
XII, 189 p.

EA; E107; eBook; Nonbooks, PBS / Technik/Wärmetechnik, Energietechnik, Kraftwerktechnik; Umwelt; Verstehen; Embedded Systems; FPGA; Integrated Circuit Design; Logic Synthesis; Memory; B; Energy, general; Circuits and Systems; Computer-Aided Engineering (CAD, CAE) and Design; Circuits and Systems; Computer-Aided Engineering (CAD, CAE) and Design; Energy Policy, Economics and Management; Electrical Power Engineering; Mechanical Power Engineering; Electronic Circuits and Systems; Computer-Aided Engineering (CAD, CAE) and Design; Engineering; Elektrotechnik; Energietechnik, Elektrotechnik und Energiemaschinenbau; Schaltkreise und Komponenten (Bauteile); Computer-Aided Design (CAD); BB

This book describes the synthesis of logic functions using memories. It is useful to design field programmable gate arrays (FPGAs) that contain both small-scale memories, called look-up tables (LUTs), and medium-scale memories, called embedded memories. This is a valuable reference for both FPGA system designers and CAD tool developers, concerned with logic synthesis for FPGAs.

Introduction.- Basic Elements.- Definitions and Basic Properties.- MUX-Based Synthesis.- Cascade-Based Synthesis.- Encoding Method.- Functions with Small C-Measures.- C-Measure of Sparse Functions.- Index Generation Functions.- Hash-Based Synthesis.- Reduction of the Number of Variables.- Various Realizations.- Conclusions.

Describes in detail the synthesis of logic functions using memories

Includes a look-up tables (LUT) cascade as a new architecture for logic synthesis

Shows logic design methods for index generation functions

Introduces C-measure, which specifies the complexity of Boolean functions

Presents hash-based design methods, which efficiently synthesize index generation functions by pairs of smaller memories and can be applied to IP address tables, packet filtering, terminal access controllers, memory patch circuits, virus scanning circuits, fault map of memories, and pattern matching

Includes supplementary material: sn.pub/extras



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