2010, ISBN: 9781441909442
Single-threaded software applications have ceased to see signi?cant gains in p- formance on a general-purpose CPU, even with further scaling in very large scale integration (VLSI) technol… More...
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2010, ISBN: 9781441909442
Single-threaded software applications have ceased to see signi?cant gains in p- formance on a general-purpose CPU, even with further scaling in very large scale integration (VLSI) technol… More...
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2010, ISBN: 9781441909442
This book deals with the acceleration of EDA algorithms using hardware platforms such as FPGAs and GPUs. Widely applied CAD algorithms are evaluated and compared for potential acceleratio… More...
Thalia.de Nr. 25416251. Shipping costs:, Sofort per Download lieferbar, DE. (EUR 0.00) Details... |
2010, ISBN: 9781441909442
This book deals with the acceleration of EDA algorithms using hardware platforms such as FPGAs and GPUs. Widely applied CAD algorithms are evaluated and compared for potential acceleratio… More...
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2010, ISBN: 9781441909442
Hardware Acceleration of EDA Algorithms ab 111.49 EURO Custom ICs, FPGAs and GPUs. Auflage 2010 Medien > Bücher, [PU: Springer]
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2010, ISBN: 9781441909442
Single-threaded software applications have ceased to see signi?cant gains in p- formance on a general-purpose CPU, even with further scaling in very large scale integration (VLSI) technol… More...
2010, ISBN: 9781441909442
Single-threaded software applications have ceased to see signi?cant gains in p- formance on a general-purpose CPU, even with further scaling in very large scale integration (VLSI) technol… More...
2010
ISBN: 9781441909442
This book deals with the acceleration of EDA algorithms using hardware platforms such as FPGAs and GPUs. Widely applied CAD algorithms are evaluated and compared for potential acceleratio… More...
2010, ISBN: 9781441909442
This book deals with the acceleration of EDA algorithms using hardware platforms such as FPGAs and GPUs. Widely applied CAD algorithms are evaluated and compared for potential acceleratio… More...
2010, ISBN: 9781441909442
Hardware Acceleration of EDA Algorithms ab 111.49 EURO Custom ICs, FPGAs and GPUs. Auflage 2010 Medien > Bücher, [PU: Springer]
Bibliographic data of the best matching book
Details of the book - Hardware Acceleration of EDA Algorithms - Custom ICs, FPGAs and GPUs
EAN (ISBN-13): 9781441909442
Publishing year: 2010
Publisher: Springer US
194 Pages
Language: eng/Englisch
Book in our database since 2007-01-10T09:50:11-05:00 (New York)
Detail page last modified on 2021-11-17T05:15:43-05:00 (New York)
ISBN/EAN: 9781441909442
ISBN - alternate spelling:
978-1-4419-0944-2
Alternate spelling and related search-keywords:
Book author: sunil, gula, gulat
Book title: hardware, eda, algorithms
Information from Publisher
Author: Sunil P Khatri; Kanupriya Gulati
Title: Hardware Acceleration of EDA Algorithms - Custom ICs, FPGAs and GPUs
Publisher: Springer; Springer US
192 Pages
Publishing year: 2010-03-11
New York; NY; US
Language: English
96,29 € (DE)
99,00 € (AT)
118,00 CHF (CH)
Available
XXII, 192 p.
EA; E107; eBook; Nonbooks, PBS / Technik/Elektronik, Elektrotechnik, Nachrichtentechnik; Schaltkreise und Komponenten (Bauteile); Verstehen; FPGA; Field Programmable Gate Array; algorithms; architecture; computer-aided design (CAD); integrated circuit; micro-alloy transistor, MAT; model; simulation; static-induction transistor; C; Electronic Circuits and Systems; Computer-Aided Engineering (CAD, CAE) and Design; Engineering; Computer-Aided Design (CAD); BC
Hardware Acceleration of EDA Algorithms: Custom ICs, FPGAs and GPUs Kanupriya Gulati Sunil P. Khatri This book deals with the acceleration of EDA algorithms using hardware platforms such as Custom ICs, FPGAs and GPUs. Widely applied CAD algorithms are studied for potential acceleration on these platforms. Coverage includes discussion of conditions under which it is preferable to use one platform over another, e.g., when an EDA problem has a high degree of data parallelism, the GPU is typically the preferred platform, whereas when the problem has more control, an FPGA may be preferred. Results are presented for the acceleration of several CAD algorithms (fault simulation, fault table generation, model card evaluation in SPICE, Monte Carlo based statistical static timing analysis, Boolean Satisfiability), demonstrating speedups up to 800X compared to single-core implementatinos of these algorithms. This book serves as a valuable guide on how best to leverage parallelism to accelerate CAD algorithms. It also presents a methodology to automatically extract SIMD parallelism from regular uniprocessor code which satisfies a set of constraints. With this approach, such uniprocessor code can automatically be converted to GPU code, allowing for significant acceleration. This approach is particularly useful since different GPUs have vastly different specifications, making the manual generation of GPU code an unscalable proposition. In particular, this book: Provides guidelines on whether to use Custom ICs, GPUs or FPGAs when accelerating a given EDA algorithm, validating these suggestions with a concrete example (Boolean Satisfiability) implemented on all these platforms; Demonstrates the acceleration of several popular EDA algorithms on GPUs, with speedups up to 800X; Helps the reader by presenting example algorithmswhich may be used by the reader to determine how best to accelerate their specific EDA algorithm; Discusses an automatic approach to generate GPU code, given regular uniprocessor code which satisfies a set of constraints; Serves as a valuable reference for anyone interested in exploring alternative hardware platforms for accelerating various EDA applications by harnessing the parallelism available in these platforms.Provides guidelines on whether to use GPUs or FPGAs when accelerating a given EDA algorithm, with validation by a concrete example implemented on both platforms Demonstrates the acceleration of several popular EDA algorithms on GPUs, with speedups from 30X to 800X Presents techniques in a way that the reader can use example algorithms presented to determine how best to accelerate their specific EDA algorithm Discusses an automatic approach to generate GPU code, given regular uniprocessor code Includes supplementary material: sn.pub/extras
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